Plessey announced that it has achieved a significant milestone in the development of its monolithic Micro LED displays with its backplane partner, Jasper Display Corp (JDC).
The two companies announced their strategic partnership in September 2018. Though intensive collaboration, Plessey has succeeded in wafer level bonding of its GaN-on-Silicon monolithic Micro LED wafers with JDC’s eSP70 silicon patented backplane technology, resulting in Micro LED displays that contain addressable LEDs. Wafer level bonding poses significant technical challenges and has not previously been achieved between a GaN-on-Silicon LED wafers and a high-density CMOS backplanes.
(Image: Plessey)
Plessey initially achieved the world’s first mechanically successful wafer to wafer bond in early April 2019. This success has now been followed by a fully functional, electrical and mechanical bond, resulting in a fully operational Micro LED display.
Plessey’s Micro LED display features an array of 1920×1080 (FHD) current-driven monochrome pixels on a pitch of 8 microns. Each display requires more than two million individual electrical bonds to connect the Micro LED pixels to the controlling backplane. The JDC backplane provides independent 10-bit single color control of each pixel – Bonding a complete LED wafer to a CMOS backplane wafer, incorporates over 100 million micro level bonds between the wafers.
At SID Display Week 2019, Plessey will unveil its Micro LED technology and demonstrate why its scalable and repeatable GaN-on-Silicon monolithic process is the only solution for next-generation augmented and mixed reality (AR/MR) display products, head-up/head-mounted (HUD/HMDs), smartphones and other Micro LED based display applications.
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